In general, a modulator circuit using a PLL synthesizer is required to be low cost, low power consumption as well as good noise characteristic and modulation accuracy. In PLL-based modulation, to provide a better modulation accuracy, it is desirable to provide a wider frequency range of a PLL (PLL bandwidth) rather than a frequency range of a modulating signal (modulation bandwidth). However, there is a problem that, broadening the PLL bandwidth fails to suppress a noise from each component of the PLL thus inviting degradation in the noise characteristic.
In the related art, a technique is described in U.S. Pat. No. 6,008,703, which sets a narrower PLL bandwidth than a modulation bandwidth and previously amplifying (pre-distorting), with modulation data, the modulating signal component suppressed by the frequency characteristic of a PLL.
FIG. 14 is a substantially faithful reproduction of the configuration shown in FIG. 2A of U.S. Pat. No. 6,008,703. In FIG. 14, a phase comparator 36, a loop filter 40, a voltage-controlled oscillator (VCO) 26, and a multilevel frequency divider 30 constitute a PLL.
Digital modulation data contains a frequency component exceeding the cutoff frequency of a PLL. A digital compensation filter 46 is used to provide digital modulation data with a characteristic inverse to the frequency characteristic of a PLL and an adder 50 is used to overlay a carrier signal. Next, the output signal of the adder 50 is modulated by the Σ Δ modulator 56 and the resulting modulating signal is used to modulate the multilevel frequency divider 30. A modulated carrier signal is thus output from the VCO 26.
(Referenced Patent Document) U.S. Pat. No. 6,008,703 (FIGS. 2A, 3A–3C, and 4)
When the above-mentioned technique is used, a flat gain characteristic can be theoretically obtained in a frequency band exceeding a cutoff frequency of a PLL concerning a closed loop frequency characteristic of a PLL. This should substantially broaden the PLL.
In case a PLL that is an analog circuit is formed into an integrated circuit, resistor and capacitor values may vary depending on the manufacture of circuit components, and the frequency characteristic of a PLL may vary accordingly. Thus, the frequency characteristic of a PLL is changed. On the other hand, the characteristic of a digital compensation filter is not changed because it is fixed by filter coefficient determined at design. As a result, the frequency characteristic of a PLL and the frequency characteristic of a digital compensation filter do not match each other.
In reality, it is difficult to obtain a flat gain characteristic in a frequency range exceeding the cutoff frequency of a PLL.
Examination results conducted by the inventor of this application are described in more details with reference to FIGS. 15 and 16.
FIG. 15 is a characteristic curve showing an ideal frequency characteristic in a related art circuit. The gain in the vertical axis in FIG. 15 is obtained by normalizing the gain in the frequency band of the PLL 6 to 0[db]. The closed loop frequency characteristic of the PLL is represented by the low-pass frequency characteristic of a cutoff frequency, similar to a characteristic curve A in FIG. 15. The characteristic of the digital compensation filter 46 in FIG. 14 has a frequency characteristic represented by the inverse characteristic of the frequency characteristic of a PLL, similar to a characteristic curve B in FIG. 15.
The digital modulation data shown in FIG. 14 is a signal of a digital value in the frequency band fBW. The digital modulation data undergoes amplification of a signal component in an area exceeding the frequency band of the PLL 6 by way of the digital compensation filter 46 as a digital filter, and the amplified signal is used to modulate the multilevel frequency divider.
As a result, the frequency characteristic of a modulated carrier signal output from the VCO 26 in FIG. 14 is synthesized with the frequency characteristic of a PLL to form a flat frequency characteristic, as shown by a characteristic curve C shown in FIG. 15. Thus, it is possible to perform modulation even in case the modulation bandwidth exceeds the bandwidth of a PLL (cutoff frequency), thereby providing both modulation accuracy and good noise characteristic.
As mentioned earlier, in reality, it is difficult to obtain such a gain characteristic due to a reason such as a variation in the characteristic of circuit components of a PLL. For example, in case a PLL is formed into an integrated circuit, resistor and capacitor values vary depending on the manufacture of circuit components, and the frequency characteristic of a PLL varies accordingly.
FIG. 16 is a characteristic curve showing the frequency characteristic obtained in case the frequency characteristic of a PLL in a related art circuit shown in FIG. 14 has varied.
In FIG. 16, a characteristic curve Ax shows a closed loop frequency characteristic of a PLL where the cutoff frequency has changed to fcx. It is assumed that the frequency characteristic of a digital compensation filter is unchanged from the design stage because it is a digital filter (characteristic curve B). Thus, the synthesized frequency characteristic is no longer flat, such as a characteristic curve Cx shown in FIG. 16.
In this way, a deviation is generated between the frequency characteristic of a PLL and the frequency characteristic of a digital compensation filter due to a variation in the manufacture of an integrated circuit. This prevents a flat characteristic from being obtained, which degrades the modulation accuracy.
The invention has been accomplished based on such examination results and has as an object to provide a modulator capable of performing wideband modulation using a PLL frequency synthesizer which can prevent degradation in modulation accuracy even in the presence of a variation in the manufacture of circuit components, and a correction method therefor.